AD5259| Datasheet

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Nonvolatile, I2C-Compatible 256-Position, Digital Potentiometer AD5259
FEATURES
Nonvolatile memory maintains wiper settings 256-position Thin LFCSP-10 (3 mm x 3 mm x 0.8 mm) package Compact MSOP-10 (3 mm 4.9 mm x 1.1mm) package I2C -compatible interface VLOGIC pin provides increased interface flexibility End-to-end resistance 5 k, 10 k, 50 k, 100 k Resistance tolerance stored in EEPROM (0.1% accuracy) Power-on EEPROM refresh time < 1ms Software write protect command Address Decode Pin AD0 and Pin AD1 allow 4 packages per bus 100-year typical data retention at 55 C Wide operating temperature -40 C to +85 C 3 V to 5 V single supply
VDD VLOGIC GND 8 I2C SERIAL INTERFACE 8 DATA CONTROL COMMAND DECODE LOGIC ADDRESS DECODE LOGIC CONTROL LOGIC RDAC EEPROM RDAC REGISTER

FUNCTIONAL BLOCK DIAGRAMS
RDAC A W B

SCL SDA

AD0 AD1

AD5259
05026-001

POWERON RESET

Figure 1. Block Diagram
VLOGIC VDD A EEPROM

APPLICATIONS
LCD panel VCOM adjustment LCD panel brightness and contrast control Mechanical potentiometer replacement in new designs Programmable power supplies RF amplifier biasing Automotive electronics adjustment Gain control and offset adjustment Fiber to the home systems Electronics level settings

SCL SDA AD0 AD1

I2 C SERIAL INTERFACE COMMAND DECODE LOGIC ADDRESS DECODE LOGIC CONTROL LOGIC

RDAC REGISTER AND LEVEL SHIFTER W

GND

Figure 2. Block Diagram Showing Level Shifters

GENERAL DESCRIPTION
The AD5259 provides a compact, nonvolatile LFCSP-10 (3 mm 3 mm) or MSOP-10 (3 mm 4.9 mm) packaged solution for 256-position adjustment applications. These devices perform the same electronic adjustment function as mechanical potentiometers 1 or variable resistors, but with enhanced resolution and solid-state reliability. The wiper settings are controllable through an I2C-compatible digital interface that is also used to read back the wiper register and EEPROM content. Resistor tolerance is also stored within EEPROM, providing an end-to-end tolerance accuracy of 0.1%. A separate VLOGIC pin delivers increased interface flexibility. For users who need multiple parts on one bus, Address Bit AD0 and Address Bit AD1 allow up to four devices on the same bus.
1

CONNECTION DIAGRAM
W 1 AD0 2 AD1 3
10

A B

AD5259

SCL 5

VLOGIC

Figure 3. Pinout

The terms digital potentiometer, VR (variable resistor), and RDAC are used interchangeably.

Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

05026-002

8 VDD TOP VIEW SDA 4 (Not to Scale) 7 GND

05026-003