AD7730| Datasheet

AD7730, AD7730L

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KEY FEATURES Resolution of 230,000 Counts (Peak-to-Peak) Offset Drift: 5 nV/ C Gain Drift: 2 ppm/ C Line Frequency Rejection: >150 dB Buffered Differential Inputs Programmable Filter Cutoffs Specified for Drift Over Time Operates with Reference Voltages of 1 V to 5 V ADDITIONAL FEATURES Two-Channel Programmable Gain Front End On-Chip DAC for Offset/TARE Removal FASTStepTM Mode AC or DC Excitation Single Supply Operation APPLICATIONS Weigh Scales Pressure Measurement GENERAL DESCRIPTION

Bridge Transducer ADC AD7730/AD7730L
The modulator output is processed by a low pass programmable digital filter, allowing adjustment of filter cutoff, output rate and settling time. The part features two buffered differential programmable gain analog inputs as well as a differential reference input. The part operates from a single +5 V supply. It accepts four unipolar analog input ranges: 0 mV to +10 mV, +20 mV, +40 mV and +80 mV and four bipolar ranges: 10 mV, 20 mV, 40 mV and 80 mV. The peak-to-peak resolution achievable directly from the part is 1 in 230,000 counts. An on-chip 6-bit DAC allows the removal of TARE voltages. Clock signals for synchronizing ac excitation of the bridge are also provided. The serial interface on the part can be configured for three-wire operation and is compatible with microcontrollers and digital signal processors. The AD7730 contains self-calibration and system calibration options, and features an offset drift of less than 5 nV/ C and a gain drift of less than 2 ppm/ C. The AD7730 is available in a 24-
pin plastic DIP, a 24-lead SOIC and 24-lead TSSOP package. The AD7730L is available in a 24-lead SOIC and 24-lead TSSOP package.
NOTE

The AD7730 is a complete analog front end for weigh-scale and pressure measurement applications. The device accepts lowlevel signals directly from a transducer and outputs a serial digital word. The input signal is applied to a proprietary programmable gain front end based around an analog modulator.

The description of the functions and operation given in this data sheet apply to both the AD7730 and AD7730L. Specifications and performance parameters differ for the parts. Specifications for the AD7730L are outlined in Appendix A.

FUNCTIONAL BLOCK DIAGRAM
AVDD VBIAS AIN1(+) AIN1( ) MUX AIN2(+)/D1 AIN2( )/D0 100nA AGND 6-BIT DAC SERIAL INTERFACE AND CONTROL LOGIC CLOCK GENERATION REGISTER BANK CALIBRATION MICROCONTROLLER ACX ACX AC EXCITATION CLOCK AGND DGND POL RDY RESET AVDD 100nA BUFFER + +/ PGA DVDD REF IN( ) REF IN(+) REFERENCE DETECT

AD7730
SIGMA-DELTA A/D CONVERTER STANDBY SYNC

SIGMADELTA MODULATOR

PROGRAMMABLE DIGITAL FILTER

MCLK IN MCLK OUT SCLK CS DIN DOUT

FASTStep is a trademark of Analog Devices, Inc.

REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 Analog Devices, Inc., 1998