AD9243| Datasheet

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FEATURES Monolithic 14-Bit, 3 MSPS A/D Converter Low Power Dissipation: 110 mW Single +5 V Supply Integral Nonlinearity Error: 2.5 LSB Differential Nonlinearity Error: 0.6 LSB Input Referred Noise: 0.36 LSB Complete: On-Chip Sample-and-Hold Amplifier and Voltage Reference Signal-to-Noise and Distortion Ratio: 79.0 dB Spurious-Free Dynamic Range: 91.0 dB Out-of-Range Indicator Straight Binary Output Data 44-Lead MQFP
VINA VINB CML CAPT CAPB VREF SENSE

Complete 14-Bit, 3.0 MSPS Monolithic A/D Converter AD9243*
FUNCTIONAL BLOCK DIAGRAM
CLK SHA
MDAC1 GAIN = 16 A/D MDAC2 GAIN = 8 A/D MDAC3 GAIN = 8 A/D

AVDD

DVDD

DRVDD

A/D

DIGITAL CORRECTION LOGIC 14 OUTPUT BUFFERS MODE SELECT 1V

OTR BIT 1 (MSB) BIT 14 (LSB)

AD9243
REFCOM AVSS DVSS DRVSS

PRODUCT DESCRIPTION

PRODUCT HIGHLIGHTS

The AD9243 is a 3 MSPS, single supply, 14-bit analog-todigital converter (ADC). It combines a low cost, high speed CMOS process and a novel architecture to achieve the resolution and speed of existing hybrid implementations at a fraction of the power consumption and cost. It is a complete, monolithic ADC with an on-chip, high performance, low noise sample-and-hold amplifier and programmable voltage reference. An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the application. The device uses a multistage differential pipelined architecture with digital output error correction logic to guarantee no missing codes over the full operating temperature range. The input of the AD9243 is highly flexible, allowing for easy interfacing to imaging, communications, medical, and dataacquisition systems. A truly differential input structure allows for both single-ended and differential input interfaces of varying input spans. The sample-and-hold amplifier (SHA) is equall
y suited for both multiplexed systems that switch full-scale voltage levels in successive channels as well as sampling single-channel inputs at frequencies up to and beyond the Nyquist rate. Also, the AD9243 performs well in communication systems employing Direct-IF Down Conversion since the SHA in the differential input mode can achieve excellent dynamic performance well beyond its specified Nyquist frequency of 1.5 MHz. A single clock input is used to control all internal conversion cycles. The digital output data is presented in straight binary output format. An out-of-range (OTR) signal indicates an overflow condition which can be used with the most significant bit to determine low or high overflow.
*Patents pending.

The AD9243 offers a complete single-chip sampling 14-bit, analog-to-digital conversion function in a 44-lead Metric Quad Flatpack. Low Power and Single Supply The AD9243 consumes only 110 mW on a single +5 V power supply. Excellent DC Performance Over Temperature The AD9243 provides no missing codes, and excellent temperature drift performance over the full operating temperature range. Excellent AC Performance and Low Noise The AD9243 provides nearly 13 ENOB performance and has an input referred noise of 0.36 LSB rms. Flexible Analog Input Range The versatile onboard sample-and-hold (SHA) can be configured for either single ended or differential inputs of varying input spans. Flexible Digital Outputs The digital outputs can be configured to interface with +3 V and +5 V CMOS logic families.

REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 Analog Devices, Inc., 1998