ADCMP563| Datasheet

ADCMP563, ADCMP564, ADCMP564

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Dual, High Speed ECL Comparators ADCMP563/ADCMP564
FEATURES
Differential ECL-compatible outputs 700 ps propagation delay input to output 75 ps propagation delay dispersion Input common-mode range: 2.0 V to +3.0 V Robust input protection Differential latch control Internal latch pull-up resistors Power supply rejection greater than 85 dB 700 ps minimum pulse width 1.5 GHz equivalent input rise time bandwidth Typical output rise/fall time of 500 ps ESD protection > 4kV HBM, >200V MM Programmable hysteresis

FUNCTIONAL BLOCK DIAGRAM
HYS* NONINVERTING INPUT

Q OUTPUT

ADCMP563/ ADCMP564
INVERTING INPUT Q OUTPUT

*ADCMP564 ONLY

Figure 1.
GND 1
QA 1 QA 2
16 15 14

04650-0-001

LATCH ENABLE INPUT

20 19 18

GND QB QB GND LEB LEB VCC INB
04650-0-012

QB QB GND LEB LEB VCC
04650-0-002

QA 2 QA 3 GND 4 LEA 5 LEA 6 VEE 7 INA 8 +INA 9 HYSA 10

APPLICATIONS
Automatic test equipment High speed instrumentation Scope and logic analyzer front ends Window comparators High speed line receivers Threshold detection Peak detection High speed triggers Patient diagnostics Hand-held test instruments Zero crossing detectors Line receivers and signal restoration Clock drivers

GND 3 LEA 4 LEA 5 VEE 6 INA 7 +INA 8

ADCMP563 BRQ
TOP VIEW (Not to Scale)

ADCMP564 BRQ
TOP VIEW (Not to Scale)

17 16 15 14 13 12 11

13 12 11 10 9

INB +INB

+INB HYSB

Figure 2. ADCMP563 16-Lead QSOP
QA
16

Figure 3. ADCMP564 20-Lead QSOP
QB
14

QA
15

QB
13 12 11 10 9 8

GND 1 LEA 2 LEA 3 VEE 4

PIN1

GND LEB LEB
111151-0-026

ADCMP563 BCP
TOP VIEW (Not to Scale)
5 6 7

VCC

GENERAL DESCRIPTION
The ADCMP563/ADCMP564 are high speed comparators fabricated on Analog Devices' proprietary XFCB process. The devices feature a 700 ps propagation delay with less than 75 ps overdrive dispersion. Dispersion, a measure of the difference in propagation delay under differing overdrive conditions, is a particularly important characteristic of high speed comparators. A separate programmable hysteresis pin is available on the ADCMP564. A differential input stage permits consistent propagation delay with a wide variety of signals in the common-mode range from -2.0 V to +3.0 V. Outputs are complementary digital signals
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

INA +INA +INB INB

Figure 4. ADCMP563 16-Lead LFCSP

that are fully compatible with ECL 10 K and 10 KH logic families. The outputs provide sufficient drive current to directly drive transmission lines terminated in 50 to -2 V. A latch input, which is included, permits tracking, track-and-hold, or sample-and-hold modes of operation. The latch input pins contain internal pull-ups that set the latch in tracking mode when left open. The ADCMP563/ADCMP564 are specified over the industrial temperature range (-40 C to +85 C).