AT49BV160S(T)_Summary| Datasheet

AT49BV160S(T)_Summary| Datasheet

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Features
Single Voltage Read/Write Operation: 2.65V to 3.6V Access Time 70 ns Sector Erase Architecture
Thirty-one 32K Word (64K Bytes) Sectors with Individual Write Lockout Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout Fast Word Program Time 10 us Typical Sector Erase Time: 32K Word Sectors 700 ms; 4K Word Sectors 100 ms Suspend/Resume Feature for Erase and Program Supports Reading and Programming from Any Sector by Suspending Erase of a Different Sector Supports Reading Any Word by Suspending Programming of Any Other Word Low-power Operation 10 mA Active 15 uA Standby VPP Pin for Write Protection and Accelerated Program Operations RESET Input for Device Initialization Softlock Sector Protection Secure Lock and Freeze Feature Top or Bottom Boot Block Configuration Available 128-bit Protection Register Minimum 100,000 Erase Cycles Common Flash Interface (CFI) CBGA Green (Pb/Halide-free/RoHS Compliant) Packaging

16-megabit (1M x 16) Secure 3-volt Only Memory AT49BV160S AT49BV160ST Summary (Complete Datasheet under NDA)

1. Description
The AT49BV160S(T) is a 2.7-volt 16-megabit Flash memory organized as 1,048,576 words of 16 bits each. The memory is divided into 39 sectors for erase operations. The device is offered in a 64-ball CBGA package. The device has CE and OE control signals to avoid any bus contention. This device can be read or reprogrammed using a single power supply, making it ideally suited for in-system programming. In some applications, in addition to the standard softlock sector protection mechanism, a requirement exists to allow for the permanent and irreversible locking of selected regions in the memory. The AT49BV160S(T) allows the user to permanently lock thirty-nine regions, and once activated these secure regions cannot be altered or erased through Software or Hardware at any time. Once activated, no facility exists to over-ride the secure lock mechanism. The size of each secure region is the same as the sector size, and the location of these regions is determined by the Top or Bottom Boot Block designation. The locat
ion of the secure regions is shown on page 3. The secure regions can be locked in any sequence and at any time during normal device operation. Read operations can still be performed on any region that has the secure lock feature enabled. Full read and write operations, standard sector operations including standard Sector locking operations can be performed on all regions that are not secure locked.

NOTE: This is a summary document. The complete document is available under NDA. For more information, please contact your local Atmel sales office.

3560AS FLASH 9/06


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