AT89C5115,_T89C5115_Errata| Datasheet

Datasheet preview, take a look at Datasheets before downloading (Data Sheet is available on manufacturer site)

Active T89C5115 Errata List
Timer 2 (Baud Rate Generator Mode) Long Start Time UART RB8 Lost with JBC on SCON Register ADC- Interrupt During Idle Conversion Flash/EEPROM First Read After Load Disturbed C51 Core Bad Exit of Power-down in X2 Mode Timer0/1 Extra Interrupt Timer1 - Mode1 Does Not Generate Baud Rate Generator for UART

80C51 MCUs T89C5115 Errata Sheet

T89C5115 Errata History
Lot Number Errata List

All lots

1, 2, 3, 4, 5, 6,7

T89C5115 Errata Description
1. Timer 2 (Baud Rate Generator Mode) Long Start Time When Timer 2 is used as baud rate generator, TH2 is not loaded with RACP2H at the beginning, then UART is not operational before almost 10,000 machine cycles. Workaround Add in software an initialization of TH2 and TL2, with the value of RCAP2H and RCAP2L. 2. UART - RB8 Lost With JBC on SCON Register When using the JBC instruction on any bit of SCON register, if RB8 changes from 1 to 0, the 0 bit can be lost. Workaround After each use clear RB8. 3. ADC - Interrupt Controller/ADC Idle Mode/Loops In High Priority Interrupt The problem occurs during an A/D conversion in idle mode, if a hardware interrupt occurs followed by a second interrupt with higher priority before the end of the A/D conversion. If the above configuration occurs, the highest priority interrupt is served immediately after the A/D conversion. At the end of the highest priority interrupt service, the processor will not serve the hardware reset interrupt pending. It will also not serve any
new interrupt requests with a priority lower than the high level priority last served. Workaround Disable all interrupts (Interrupt Global Enable Bit) before starting an A/D conversion in idle mode, then re-enable all interrupts immediately after. 4. Flash/EEPROM First Read After Load Disturbed In the "In-Application Programming" mode from the Flash, if the User software application load the Column Latch Area prior to call the programming sequence in the CAN Bootloader.