100341

100341 Low Power 8-Bit Shift Register

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100341 Low Power 8-Bit Shift Register

July 1988 Revised August 2000

100341 Low Power 8-Bit Shift Register
General Description
The 100341 contains eight edge-triggered, D-type flip-flops with individual inputs (Pn) and outputs (Qn) for parallel operation, and with serial inputs (Dn) and steering logic for bidirectional shifting. The flip-flops accept input data a setup time before the positive-going transition of the clock pulse and their outputs respond a propagation delay after this rising clock edge. The circuit operating mode is determined by the Select inputs S0 and S1, which are internally decoded to select either "parallel entry", "hold", "shift left" or "shift right" as described in the Truth Table. All inputs have 50 k pulldown resistors.

Features
s 35% power reduction of the 100141 s 2000V ESD protection s Pin/function compatible with 100141 s Voltage compensated operating range -4.2V to -5.7V s Available to industrial grade temperature range

Ordering Code:
Order Number 10034SC 100341PC 100341QI 100341QC Package Number M24B N24E V28A V28A Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (-40 C to 85 C)

Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.

Logic Symbol

Connection Diagrams
24-Pin DIP/SOIC

Pin Descriptions
Pin Names CP S0 , S1 D0 , D7 P0 P7 Q0 Q7 Description Clock Input Select Inputs Serial Inputs Parallel Inputs Data Outputs 28-Pin PLCC

2000 Fairchild Semiconductor Corporation

DS009880

www.fairchildsemi.com