74ABT126

74ABT126 Quad Buffer with 3-STATE Outputs

Datasheet preview, take a look at Datasheets before downloading (Data Sheet is available on manufacturer site)

74ABT126 Quad Buffer with 3-STATE Outputs

January 1995 Revised February 2005

74ABT126 Quad Buffer with 3-STATE Outputs
General Description
The ABT126 contains four independent non-inverting buffers with 3-STATE outputs.

Features
s Non-inverting buffers s Output sink capability of 64 mA, source capability of 32 m s Guaranteed latchup protection s High impedance glitch free bus loading during entire power up and power down cycle s Nondestructive hot insertion capability s Disable time less than enable time to avoid bus contention

Ordering Code:
Order Number 74ABT126CSC 74ABT126CSJ 74ABT126CMTC 74ABT126CMTCX NL (Note 1) Package Number M14A M14D MTC14 MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: " NL" indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Connection Diagram

Pin Descriptions
Pin Names An , Bn On Descriptions Inputs Outputs

Function Table
Inputs An H H L
H HIGH Voltage Level L LOW Voltage Level Z HIGH Impedance X Immaterial

Output Bn L H X On L H Z

2005 Fairchild Semiconductor Corporation

DS011692

www.fairchildsemi.com