74ABT543

74ABT543 Octal Registered Transceiver with 3-STATE Outputs

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74ABT543 Octal Registered Transceiver with 3-STATE Outputs

November 1992 Revised January 1999

74ABT543 Octal Registered Transceiver with 3-STATE Outputs
General Description
The ABT543 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. s Separate controls for data flow in each direction s Guaranteed output skew s Guaranteed multiple output switching specifications s Output switching specified for both 50 pF and 250 pF loads s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed latchup protection s High impedance glitch free bus loading during entire power up and power down cycle s Nondestructive hot insertion capability

Features
s Back-to-back registers for storage s Bidirectional data path s A and B outputs have current sourcing capability of 32 mA and current sinking capability of 64 mA

Ordering Code:
Order Number 74ABT543CSC 74ABT543CMSA 74ABT543CMTC Package Number M24B MSA24 MTC24 Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Body 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.

Connection Diagram
Pin Assignment for SOIC, SSOP and TSSOP

Pin Descriptions
Pin Names OEAB, OEBA LEAB, LEBA CEAB, CEBA A0 A7 B0 B7 Description Output Enable Inputs Latch Enable Inputs Chip Enable Inputs Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs

1999 Fairchild Semiconductor Corporation

DS011508.prf

www.fairchildsemi.com