74ALVC16721

74ALVC16721 Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs

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74ALVC16721 Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs

October 2001 Revised October 2001

74ALVC16721 Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16721 contains twenty non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The 74ALVC16721 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The 74ALVC16721 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

Features
s 1.8V 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s tPD (CLK to O n) 4.0 ns max for 3.0V to 3.6V VCC 4.9 ns max for 2.3V to 2.7V VCC 8.8 ns max for 1.65V to 1.95V VCC s Power-off high impedance inputs and outputs s Supports live insertion and withdrawal (Note 1) s Uses patented noise/EMI reduction circuitry s Latchup conforms to JEDEC JED78 s ESD performance: Human body model 2000V Machine model 200V
Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Ordering Code:
Order Number 74ALVC16721MTD Package Number MTD56 Package Description 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.

Logic Symbol

Pin Descriptions
Pin Names OE CLK D0 D19 O0 O19 CE Description Output Enable Input (Active LOW) Clock Input Inputs Outputs Clock Enable Input (Active LOW)

2001 Fairchild Semiconductor Corporation

DS500691

www.fairchildsemi.com