74F08

74F08 Quad 2-Input AND Gate

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74F08 Quad 2-Input AND Gate

April 1988 Revised September 2000

74F08 Quad 2-Input AND Gate
General Description
This device contains four independent gates, each of which performs the logic AND function.

Ordering Code:
Order Number 74F08SC 74F08SJ 74F08PC Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.

Logic Symbol
IEEE/IEC

Connection Diagram

Unit Loading/Fan Out
U.L. Pin Names An , Bn On Description HIGH/LOW Inputs Outputs 1.0/1.0 50/33.3 Input IIH/IIL Output IOH/IOL 20 A/-0.6 mA

-1 mA/20 mA

2000 Fairchild Semiconductor Corporation

DS009457

www.fairchildsemi.com