74F373

74F373 Octal Transparent Latch with 3-STATE Outputs

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74F373 Octal Transparent Latch with 3-STATE Outputs

May 1988 Revised September 2000

74F373 Octal Transparent Latch with 3-STATE Outputs
General Description
The 74F373 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH the bus output is in the high impedance state.

Features
s Eight latches in a single package s 3-STATE outputs for bus interfacing s Guaranteed 4000V minimum ESD protection

Ordering Code:
Order Number 74F373SC 74F373SJ 74F373MSA 74F373PC Package Number M20B M20D MSA20 N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

2000 Fairchild Semiconductor Corporation

DS009523

www.fairchildsemi.com