74LVQ125

74LVQ125 Low Voltage Quad Buffer with 3-STATE Outputs

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74LVQ125 Low Voltage Quad Buffer with 3-STATE Outputs

February 1992 Revised June 2001

74LVQ125 Low Voltage Quad Buffer with 3-STATE Outputs
General Description
The LVQ125 contains four independent non-inverting buffers with 3-STATE outputs.

Features
s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed pin-to-pin skew AC performance s Guaranteed incident wave switching into 75

Ordering Code:
Order Number 74LVQ125SC 74LVQ125SJ Package Number M14A M14D Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.

Logic Symbol
IEEE/IEC

Connection Diagram

Pin Descriptions
Pin Names An , Bn On Description Inputs Outputs

Truth Table
Inputs An L L H
H HIGH Voltage Level L LOW Voltage Level Z HIGH Impedance X Immaterial

Output Bn L H X On L H Z

2001 Fairchild Semiconductor Corporation

DS011349

www.fairchildsemi.com