74LVX138

74LVX138 Low Voltage 1-of-8 Decoder/Demultiplexer

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74LVX138 Low Voltage 1-of-8 Decoder/Demultiplexer

June 1993 Revised October 2003

74LVX138 Low Voltage 1-of-8 Decoder/Demultiplexer
General Description
The LVX138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three LVX138 devices or a 1-of-32 decoder using four LVX138 devices and one inverter.

Features
s Input voltage level translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance

Ordering Code:
Order Number 74LVX138M 74LVX138SJ 74LVX138MTC Package Number M16A M16D MTC16 Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.

Logic Symbols

Connection Diagram

Pin Descriptions
IEEE/IEC Pin Names A0 A2 E1 E2 E3 O0 O7 Description Address Inputs Enable Inputs Enable Input Outputs

2003 Fairchild Semiconductor Corporation

DS011615

www.fairchildsemi.com