CD4013BC Dual D-Type Flip-Flop
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CD4013BC Dual D-Type Flip-Flop
October 1987 Revised March 2002
CD4013BC Dual D-Type Flip-Flop
General Description
The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors. Each flip-flop has independent data, set, reset, and clock inputs and "Q" and "Q" outputs. These devices can be used for shift register applications, and by connecting "Q" output to the data input, for counter and toggle applications. The logic level present at the "D" input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line respectively.
Features
s Wide supply voltage range: 3.0V to 15V s High noise immunity: 0.45 VDD (typ.) s Low power TTL: fan out of 2 driving 74L compatibility: or 1 driving 74LS
Applications
Automotive Data terminals Instrumentation Medical electronics Alarm system Industrial electronics Remote metering Computers
Ordering Code:
Order Number CD4013BCM CD4013BCSJ CD4013BCN Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Truth Table
CL (Note 1) D 0 1 x x x x R 0 0 0 1 0 1 S 0 0 0 0 1 1 Q 0 1 Q 0 1 1 Q 1 0 Q 1 0 1
x x x
No Change x Don t Care Case Note 1: Level Change
Top View
2002 Fairchild Semiconductor Corporation
DS005946
CD4013BC Datasheet Fairchild Download PDF
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