DM74ALS138 3 to 8 Line Decoder/Demultiplexer
Datasheet preview, take a look at Datasheets before downloading (Data Sheet is available on manufacturer site)
DM74ALS138 3 to 8 Line Decoder/Demultiplexer
September 1986 Revised February 2000
DM74ALS138 3 to 8 Line Decoder/Demultiplexer
General Description
These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The DM74ALS138 decodes one-of-eight lines, based upon the conditions at the three binary select inputs and the three enable inputs. Two active-LOW and one active-HIGH enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented with no external inverters, and 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. This decoder/demultiplexer features fully buffered inputs, presenting only one normalized load to i
ts driving circuit. All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and simplify system design.
Features
s Designed specifically for high speed: Memory decoders Data transmission systems s 3- to 8-line decoder incorporates 3 enable inputs to simplify cascading and/or data reception s Low power dissipation...23 mW typ s Switching specifications guaranteed over full temperature and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process
Ordering Code:
Order Number DM74ALS138M DM74ALS138SJ DM74ALS138N Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Function Table
Enable Inputs G1 X L H H H H H H H H C G2 (Note 1) H X L L L L L L L L X X L L L L H H H H Select Inputs B X X L L H H L L H H Outputs A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 X X L H L H L H L H H H L H H H H H H H H H H L H H H H H H H H H H L H H H H H H H H H H L H H H H H H H H H H L H H H H H H H H H H L H H H H H H H H H H L H H H H H H H H H H L
Note 1: G2 G2A G2B
2000 Fairchild Semiconductor Corporation
DS006111
DM74ALS138 Datasheet Fairchild Download PDF
Add this permalink to your bookmarks for future download of DM74ALS138 datasheet
Permalink: http://datasheet.emcelettronica.com/fairchild/DM74ALS138

Recent comments
2 days 7 hours ago
6 days 12 hours ago
1 week 22 min ago
3 weeks 2 days ago
3 weeks 2 days ago
4 weeks 1 day ago
4 weeks 1 day ago
4 weeks 6 days ago
4 weeks 6 days ago
5 weeks 4 hours ago