DM74ALS564A

DM74ALS564A Octal D-Type Edge-Triggered Flip-Flop with

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DM74ALS564A Octal D-Type Edge-Triggered Flip-Flop with

May 2007

DM74ALS564A Octal D-Type Edge-Triggered Flip-Flop with
Features
Switching specifications at 50pF Switching specifications guaranteed over full

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General Description
These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops of the DM74ALS564A are edgetriggered inverting D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the complement of the logic states that were set up at the D inputs. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the highimpedance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the
internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF.

temperature and VCC range
Advanced oxide-isolated, ion-implanted Schottky TTL

process
3-STATE buffer-type outputs drive bus lines directly

Ordering Information
Order Number
DM74ALS564AWM

Package Number
M20B

Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering number.

1986 Fairchild Semiconductor Corporation DM74ALS564A Rev. 1.3

www.fairchildsemi.com

DM74ALS564A Datasheet Fairchild Download PDF

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