DM74ALS573B

DM74ALS573B Extended Temperature Octal D-Type Transparent Latch with 3-STATE Outputs

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DM74ALS573B Extended Temperature Octal D-Type Transparent Latch with 3-STATE Outputs

April 1984 Revised February 2000

DM74ALS573B Extended Temperature Octal D-Type Transparent Latch with 3-STATE Outputs
General Description
These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches of the DM74ALS573B are transparent Dtype latches. While the enable (G) is HIGH the Q outputs will follow the data (D) inputs. When the enable is taken LOW the output will be latched at the level of the data that was set UP. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The output control do
es not affect the internal operation of the latches. That is, the old data can be retained or new data can be entered even while the outputs are OFF.

Features
s Switching specifications at 50 pF s Switching specifications guaranteed over full temperature and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s Functionally equivalent with DM74LS373 s Improved AC performance over DM74LS373 at approximately half the power s 3-STATE buffer-type outputs drive bus lines directly

Ordering Code:
Order Number DM74ALS573BWM DM74ALS573BSJ DM74ALS573BN Package Number M20B M20D N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.

Connection Diagram

2000 Fairchild Semiconductor Corporation

DS006226

www.fairchildsemi.com

DM74ALS573B Datasheet Fairchild Download PDF

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