February 1998

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February 1998

FDS8926A Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
SO-8 N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to provide superior switching performance and minimize on-state resistance. These devices are particularly suited for low voltage applications such as disk drive motor control, battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.

Features
5.5 A, 30 V. RDS(ON) 0.030 VGS 4.5 V RDS(ON) 0.038 VGS 2.5 V. High density cell design for extremely low RDS(ON). Combines low gate threshold (fully enhanced at 2.5V) with high breakdown voltage of 30 V. High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package.

SOT-23

SuperSOTTM-6

SuperSOTTM-8

SO-8

SOT-223

SOIC-16

D2 D1 D1 D2

5 6 G2 7 8

4 3 2 1

S FD 6A 2 89
S2 G1

SO-8

pin 1

S1

Absolute Maximum Ratings
Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed

TA 25oC unless other wise noted FDS8926A 30 8
(Note 1a)

Units V V A

5.5 20 2

Power Dissipation for Dual Operation Power Dissipation for Single Operation
(Note 1a) (Note 1b) (Note 1c)

W

1.6 1 0.9 -55 to 150 C

TJ,TSTG RJA RJC

Operating and Storage Temperature Range

THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)

78 40

C/W C/W
FDS8926A Rev.B

1998 Fairchild Semiconductor Corporation

FDS8926A Datasheet Fairchild Download PDF

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FDS8926A DATASHEET