May 1998

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May 1998

FDS8934A Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
SO-8 P-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.

Features
-4 A , -20 V, RDS(ON) 0.055 VGS -4.5 V, RDS(ON) 0.072 VGS -2.5 V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package.

SOT-23

SuperSOTTM-6

SuperSOTTM-8

SO-8

SOT-223

SOIC-16

D2 D1 D1 D2

S FD 4A 3 89
G1 S2 G2

5 6 7 8

4 3 2 1

SO-8

pin 1

S1

Absolute Maximum Ratings
Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed

TA 25oC unless otherwise noted FDS8934A -20 -8
(Note 1a)

Units V V A

-4 -20 2

Power Dissipation for Dual Operation Power Dissipation for Single Operation
(Note 1a) (Note 1b) (Note 1c)

W

1.6 1 0.9 -55 to 150 C

TJ,TSTG RJA RJC

Operating and Storage Temperature Range

THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)

78 40

C/W C/W

1998 Fairchild Semiconductor Corporation

FDS8934A Rev.B

FDS8934A Datasheet Fairchild Download PDF

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FDS8934A DATASHEET