FIN1102

FIN1102 LVDS 2 Port High Speed Repeater

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FIN1102 LVDS 2 Port High Speed Repeater

January 2002 Revised February 2002

FIN1102 LVDS 2 Port High Speed Repeater
General Description
This 2 port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The FIN1102 accepts and outputs LVDS levels with a typical differential output swing of 330 mV which provides low EMI at ultra low power dissipation even at high frequencies. The FIN1102 provides a VBB reference for AC coupling on the inputs. In addition the FIN1102 can also directly accept LVPECL, HSTL, and SSTL-2 for translation to LVDS.

Features
s Greater than 800 Mbps full differential path s 3.3V power supply operation s 3.5 ps maximum random jitter and 135 ps maximum deterministic jitter s Wide rail-to-rail common mode range s LVDS receiver inputs accept LVPECL, HSTL, and SSTL-2 directly s Ultra low power consumption s 20 ps typical channel-to-channel skew s Power off protection s 7 kV HBM ESD Protection s Meets or exceeds the TIA/EIA-644-A LVDS standard s 14-lead TSSOP package saves space s Open circuit fail safe protection s VBB reference output

Ordering Code:
Order Number FIN1102MTC Package Number MTC14 Package Description 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.

Pin Descriptions
Pin Name RIN1 , RIN2 RIN1-, RIN2- Description Non-inverting LVDS Input Inverting LVDS Input

Connection Diagram

DOUT1 , DOUT2 Non-inverting Driver Output DOUT1-, DOUT2- Inverting Driver Output EN VCC GND VBB Driver Enable Pin for All Output Power Supply Ground Reference Voltage Output

Function Table
Inputs EN H H H L
H HIGH Logic Level L LOW Logic Level X Don t Care Z High Impedance

Outputs DIN- L H X DOUT H L H Z DOUT- L H L Z

Functional Diagram

DIN H L X

Fail Safe Case

2002 Fairchild Semiconductor Corporation

DS500657

www.fairchildsemi.com