FQD6P25

FQD6P25 / FQU6P25

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FQD6P25 / FQU6P25

April 2000

QFET
FQD6P25 / FQU6P25
250V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switching DC/DC converters.

Features
-4.7A, -250V, RDS(on) 1.1 VGS -10 V Low gate charge ( typical 21 nC) Low Crss ( typical 20 pF) Fast switching 100% avalanche tested Improved dv/dt capability

D G G S

D-PAK
FQD Series

I-PAK
G D S
FQU Series

Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD

TC 25 C unless otherwise noted

Parameter Drain-Source Voltage - Continuous (TC 25 C) Drain Current - Continuous (TC 100 C) Drain Current - Pulsed
(Note 1)

FQD6P25 / FQU6P25 -250 -4.7 -3.0 -18.8 30
(Note 2) (Note 1) (Note 1) (Note 3)

Units V A A A V mJ A mJ V/ns W W W/ C C C

Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA 25 C) Power Dissipation (TC 25 C)

540 -4.7 5.5 -5.5 2.5 55 0.44 -55 to 150 300

TJ, TSTG TL

- Derate above 25 C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8from case for 5 seconds

Thermal Characteristics
Symbol RJC RJA RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient Typ ---Max 2.27 50 110 Units CW CW CW

When mounted on the minimum pad size recommended (PCB Mount)
2000 Fairchild Semiconductor International Rev. A, April 2000