FQD7N20L

FQD7N20L / FQU7N20L

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FQD7N20L / FQU7N20L

December 2000

QFET
FQD7N20L / FQU7N20L
200V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation modes. These devices are well suited for high efficiency switching DC/DC converters, switch mode power supplies, and motor control.

Features
5.5A, 200V, RDS(on) 0.75 VGS 10 V Low gate charge ( typical 6.8 nC) Low Crss ( typical 8.5 pF) Fast switching 100% avalanche tested Improved dv/dt capability Low level gate drive requirement allowing direct operation from logic drivers

D D

G G S

"
" "

D-PAK
FQD Series

I-PAK
G D S
FQU Series

Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD

TC 25 C unless otherwise noted

Parameter Drain-Source Voltage - Continuous (TC 25 C) Drain Current - Continuous (TC 100 C) Drain Current - Pulsed
(Note 1)

FQD7N20L / FQU7N20L 200 5.5 3.48 22 20
(Note 2) (Note 1) (Note 1) (Note 3)

Units V A A A V mJ A mJ V/ns W W W/ C C C

Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA 25 C) Power Dissipation (TC 25 C)

73 5.5 4.5 5.5 2.5 45 0.36 -55 to 150 300

TJ, TSTG TL

- Derate above 25 C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

Thermal Characteristics
Symbol RJC RJA RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient Typ ---Max 2.78 50 110 Units C/W C/W C/W

When mounted on the minimum pad size recommended (PCB Mount)
2000 Fairchild Semiconductor International Rev. A2, December 2000