FQPF3P50

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FQPF3P50

August 2000

QFET
FQPF3P50
500V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for electronic lamp ballast based on complimentary half bridge.

Features
-1.9A, -500V, RDS(on) 4.9 VGS -10 V Low gate charge ( typical 18 nC) Low Crss ( typical 9.5 pF) Fast switching 100% avalanche tested Improved dv/dt capability

GD S

TO-220F
FQPF Series

Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL

TC 25 C unless otherwise noted

Parameter Drain-Source Voltage - Continuous (TC 25 C) Drain Current - Continuous (TC 100 C) Drain Current - Pulsed
(Note 1)

FQPF3P50 -500 -1.9 -1.2 -7.6 30
(Note 2) (Note 1) (Note 1) (Note 3)

Units V A A A V mJ A mJ V/ns W W/ C C C

Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC 25 C)

250 -1.9 3.9 -4.5 39 0.31 -55 to 150 300

- Derate above 25 C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

Thermal Characteristics
Symbol RJC RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Typ --Max 3.2 62.5 Units C/W C/W

2000 Fairchild Semiconductor International

Rev. A, August 2000