FQPF7N10L

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FQPF7N10L

December 2000

QFET
FQPF7N10L
100V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation modes. These devices are well suited for low voltage applications such as high efficiency switching DC/DC converters, and DC motor control.

Features
5.5A, 100V, RDS(on) 0.35 VGS 10 V Low gate charge ( typical 4.6 nC) Low Crss ( typical 12 pF) Fast switching 100% avalanche tested Improved dv/dt capability 175 C maximum junction temperature rating Low level gate drive requirments allowing direct operation from logic drives

G GD S

"
" "

TO-220F
FQPF Series

Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL

TC 25 C unless otherwise noted

Parameter Drain-Source Voltage - Continuous (TC 25 C) Drain Current - Continuous (TC 100 C) Drain Current - Pulsed
(Note 1)

FQPF7N10L 100 5.5 3.89 22 20
(Note 2) (Note 1) (Note 1) (Note 3)

Units V A A A V mJ A mJ V/ns W W/ C C C

Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC 25 C)

50 5.5 2.3 6.0 23 0.15 -55 to 175 300

- Derate above 25 C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

Thermal Characteristics
Symbol RJC RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Typ --Max 6.52 62.5 Units C/W C/W

2000 Fairchild Semiconductor International

Rev. A4, December 2000