FQPF9N50C

FQP9N50C/FQPF9N50C

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FQP9N50C/FQPF9N50C

QFET
FQP9N50C/FQPF9N50C
500V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction, electronic lamp ballasts based on half bridge topology.

Features
9 A, 500V, RDS(on) 0.8 VGS 10 V Low gate charge ( typical 28 nC) Low Crss ( typical 24 pF) Fast switching 100% avalanche tested Improved dv/dt capability

G G DS

TO-220
FQP Series

GD S

TO-220F
FQPF Series

Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL

TC 25 C unless otherwise noted

Parameter Drain-Source Voltage - Continuous (TC 25 C) Drain Current - Continuous (TC 100 C) Drain Current - Pulsed
(Note 1)

FQP9N50C 500 9 5.4 36

FQPF9N50C 9 5.4 36 30 360 9 13.5 4.5

Units V A A A V mJ A mJ V/ns W W/ C C C

Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC 25 C)
(Note 2) (Note 1) (Note 1) (Note 3)

- Derate above 25 C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

135 1.07 -55 to 150 300

44 0.35

Drain current limited by maximum junction temperature

Thermal Characteristics
Symbol RJC RCS RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Case-to-Sink Typ. Thermal Resistance, Junction-to-Ambient FQP9N50C 0.93 0.5 62.5 FQPF9N50C 2.86 -62.5 Units C/W C/W C/W

2003 Fairchild Semiconductor Corporation

Rev. A, June 2003