MM74HC02

MM74HC02 Quad 2-Input NOR Gate

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MM74HC02 Quad 2-Input NOR Gate

September 1983 Revised January 2005

MM74HC02 Quad 2-Input NOR Gate
General Description
The MM74HC02 NOR gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have buffered outputs, providing high noise immunity and the ability to drive 10 LS-TTL loads. The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

Features
s Typical propagation delay: 8 ns s Wide power supply range: 2 6V s Low quiescent supply current: 20 A maximum (74HC Series) s Low input current: 1 A maximum s High output current: 4 mA minimum

Ordering Code:
Order Number MM74HC02M MM74HC02SJ MM74HC02MTC MM74HC02MTCX NL MM74HC02N Package Number M14A M14D MTC14 MTC14 N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. (Tape and Reel not available in N14A.) Pb-Free package per JEDEC J-STD-020B.

Connection Diagram
Pin Assignment for DIP, SOIC, SOP and TSSOP

Top View

Logic Diagram

2005 Fairchild Semiconductor Corporation

DS005294

www.fairchildsemi.com