MM74HC132

MM74HC132 Quad 2-Input NAND Schmitt Trigger

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MM74HC132 Quad 2-Input NAND Schmitt Trigger

September 1983 Revised January 2005

MM74HC132 Quad 2-Input NAND Schmitt Trigger
General Description
The MM74HC132 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads. The 74HC logic family is functionally and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

Features
s Typical propagation delay: 12 ns s Wide power supply range: 2V 6V s Low quiescent current: 20 A maximum (74HC Series) s Low input current: 1 A maximum s Fanout of 10 LS-TTL loads s Typical hysteresis voltage: 0.9V at VCC 4.5V

Ordering Code:
Order Number MM74HC132M MM74HC132MX NL MM74HC132SJ MM74HC132MTC MM74HC132N Package Number M14A M14A M14D MTC14 N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. (Tape and Reel not available in N14A.) Pb-Free package per JEDEC J-STD-020B.

Connection Diagram
Pin Assignment for DIP, SOIC, SOP, and TSSOP

Logic Diagram

Top View

2005 Fairchild Semiconductor Corporation

DS005309

www.fairchildsemi.com