MPC565PB| Datasheet

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Freescale Semiconductor, Inc.
Product Brief
MPC565PB/D Rev. 3, 2/2003 MPC565/MPC566 Product Brief

Freescale Semiconductor, Inc...

This document provides an overview of the MPC565/MPC566 microcontrollers, including a block diagram showing the major modular components, sections that list the major features, and differences between the MPC565/MPC566 and the MPC555. The MPC565 and MPC566 devices are members of the Motorola MPC500 RISC Microcontroller family. The parts herein will be referred to only as MPC565 unless specific parts need to be referenced.
Table 1. MPC565/MPC566 Features
Device MPC565 MPC566 Flash 1 Mbyte 1 Mbyte Code Compression Code compression not supported Code compression supported

Introduction
PowerPCTM core with a floating point unit (FPU) and a burst buffer controller (BBC) Unified system integration unit (USIU), a flexible memory controller, and improved interrupt controller 1 Mbyte of Flash memory (UC3F) -- Typical endurance of 100,000 write/erase cycles @ 25 C -- Typical data retention of 100 years @ 25 C 36 Kbytes of static RAM (two CALRAM modules) -- 8 Kbytes of normal access or overlay access (sixteen 512-byte regions) -- 4 Kbytes in CALRAM A, 4 Kbytes in CALRAM B Three time processor units (TPU3) -- TPU3 A and TPU3 B are connected to DPTRAM AB (6 Kbytes) -- TPU3 C is connected to DPTRAM C (4 Kbytes) A 22-timer channel modular I/O system (MIOS14) -- Same as MIOS1 plus a real-time clock sub-module (MRTCSM), 4 counter sub-modules (MCSM), and 4 PWM sub-modules (MPWMSM) Three TouCAN modules (TouCAN_A, TouCAN_B, and TouCAN_C) Two enhanced queued analog to digital converters (QADC64E A, QADC64E B) with analog multiplexers (AMUX) for 40 total analog channels. These modules are configured so each
module can access all 40 of the analog inputs to the part.

The MPC565 device offers the following features:

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