25LC512| Datasheet

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25LC512
512 Kbit SPI Bus Serial EEPROM
Device Selection Table
Part Number 25LC512 VCC Range 2.5-5.5V Page Size 128 Byte Temp. Ranges I,E Packages P, SN, SM, MF

Features:
20 MHz max. Clock Speed Byte and Page-level Write Operations - 128-byte page - 5 ms max. - No page or sector erase required Low-Power CMOS Technology - Max. Write Current: 5 mA at 5.5V, 20 MHz - Read Current: 10 mA at 5.5V, 20 MHz - Standby Current: 1A at 2.5V (Deep powerdown) Electronic Signature for Device ID Self-Timed Erase and Write cycles - Page Erase (5 ms, typical) - Sector Erase (10 ms/sector, typical) - Bulk Erase (10 ms, typical) Sector Write Protection (16K byte/sector) - Protect none, 1/4, 1/2 or all of array Built-In Write Protection - Power-on/off data protection circuitry - Write enable latch - Write-protect pin High Reliability - Endurance: 1 Million erase/write cycles - Data Retention: >200 years - ESD Protection: >4000V Temperature Ranges Supported; - Industrial (I): -40 C to +85 C - Automotive (E): -40 C to +125 C Pb-free and RoHS Compliant

Description:
The Microchip Technology Inc. 25LC512 is a 512 Kbit serial EEPROM memory with byte-level and page-level serial EEPROM functions. It also features Page, Sector and Chip erase functions typically associated with Flash-based products. These functions are not required for byte or page write operations. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled by a Chip Select (CS) input. Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts. The 25LC512 is available in standard packages including 8-lead PDIP, SOIC, and advanced 8-lead DFN package. All packages are Pb-free and RoHS compliant.

Package Types (not to scale)
DFN
25LC512
CS 1 SO 2 WP 3 VSS 4

(MF)
8 7 6 5 VCC HOLD SCK SI

PDIP/SOIC/SOIJ
(P, SN, SM) 25LC512
8 7 6 5 CS SO WP VSS 1 2 3 4 VCC HOLD SCK SI

Pin Function Table
Name CS SO WP VSS SI SCK HOLD VCC Function Chip Select Input Serial Data Output Write-Protect Ground Serial Data Input Serial Clock Input Hold Input Supply Voltage

2007 Microchip Technology Inc.

Preliminary

DS22065A-page 1