74ALVT16601_3| Datasheet

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74ALVT16601
18-bit universal bus transceiver; 3-state
Rev. 03 -- 5 July 2005 Product data sheet

1. General description
The 74ALVT16601 is a high-performance Bipolar Complementary Metal Oxide Semiconductor (BiCMOS) product designed for VCC operation at 2.5 V and 3.3 V with I/O compatibility up to 5 V. This device is an 18-bit universal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A-bus data is latched if CPAB is held at a HIGH or LOW level. If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CPAB. When OEAB is LOW, the outputs are active. When OEAB is HIGH, the outputs are in the high-impedance state. The clocks can be controlled with the clock enable inputs (CEAB and CEBA). Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. Active bus hold circuitry is
provided to hold unused or floating data inputs at a valid logic level.

2. Features
s s s s s s s s s s s s s s 18-bit bidirectional bus interface 5 V I/O compatible 3-state buffers Output capability: +64 mA and -32 mA TTL input and output switching levels Input and output interface capability to systems at 5 V supply Bus hold data inputs eliminate the need for external pull-up resistors to hold unused inputs Live insertion and extraction permitted Power-up reset Power-up 3-state No bus current loading when output is tied to 5 V bus Positive-edge triggered clock inputs Latch-up protection: x JESD78: exceeds 500 mA ESD protection: x MIL STD 883, method 3015: exceeds 2000 V x Machine model: exceeds 200 V