74HC_HCT123_4| Datasheet

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74HC123; 74HCT123
Dual retriggerable monostable multivibrator with reset
Rev. 04 -- 16 June 2006 Product data sheet

1. General description
The 74HC123; 74HCT123 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC123; 74HCT123 are dual retriggerable monostable multivibrators with output pulse width control by three methods: 1. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). 2. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired. Alternatively an output delay can be terminated at any time by a LOW-going edge on input nRD, which also inhibits the triggering. 3. An internal connection from nRD to the input gates makes it possible to trigger the circuit by a HIGH-going signal at input nRD as shown in the function table. Schmitt-trigger action in the nA and nB inputs, makes th
e circuit highly tolerant to slower input rise and fall times. The 74HC123; 74HCT123 is identical to the 74HC423; 74HCT423 but can be triggered via the reset input.

2. Features
I I I I I DC triggered from active HIGH or active LOW inputs Retriggerable for very long pulses up to 100 % duty factor Direct reset terminates output pulse Schmitt-trigger action on all inputs except for the reset input ESD protection: N HBM EIA/JESD22-A114-C exceeds 2000 V N MM EIA/JESD22-A115-A exceeds 200 V I Specified from -40 C to +85 C and from -40 C to +125 C