74HC_HCT1G125_5| Datasheet

By datasheet - May 14th, 2008

74HC_HCT1G125_5| Datasheet

Datasheet preview, take a look at Datasheets before downloading (Data Sheet is available on manufacturer site)

74HC1G125; 74HCT1G125
Bus buffer/line driver; 3-state
Rev. 05 -- 23 December 2005 Product data sheet

1. General description
The 74HC1G125; 74HCT1G125 is a high-speed, Si-gate CMOS device. The 74HC1G125; 74HCT1G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (pin OE). A HIGH level at pin OE causes the output to assume a high-impedance OFF-state. The bus driver output currents are equal compared to the 74HC125 and 74HCT125.

2. Features
s s s s s s Wide supply voltage range from 2.0 V to 6.0 V Symmetrical output impedance High noise immunity Low power consumption Balanced propagation delays ESD protection: x HBM EIA/JESD22-A114-C exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V s Very small 5 pins packages s Specified from -40 C to +85 C and -40 C to +125 C

3. Quick reference data
Table 1: Quick reference data GND = 0 V; Tamb = 25 C; tr = tf 6.0 ns. Symbol tPHL, tPLH Ci CPD Parameter Conditions Min VI = GND to VCC
[1]

Typ 9 1.5 30

Max -

Unit ns pF pF

74HC1G125 propagation delay A to Y VCC = 5 V; CL = 15 pF input capacitance power dissipation capacitance