74LV4066_3| Datasheet

By datasheet - May 14th, 2008

74LV4066_3| Datasheet

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74LV4066
Quad bilateral switches
Rev. 03 -- 4 July 2005 Product data sheet

1. General description
The 74LV4066 is a low-voltage Si-gate CMOS device that is pin and function compatible with the 74HC4066 and 74HCT4066. The 74LV4066 has four independent switches. Each switch has two input/output pins (nY, nZ) and an active HIGH enable input pin (nE). When nE is LOW the corresponding analog switch is turned off. The 74LV4066 has a ON-resistance which is reduced in comparison with the 74HCT4066.

2. Features
s s s s Optimized for low-voltage applications: 1.0 V to 3.6 V Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25 C Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Very low ON-resistance: x 60 (typical) at VCC = 2.0 V x 35 (typical) at VCC = 3.0 V x 25 (typical) at VCC = 4.5 V s ESD protection: x HBM EIA/JESD22-A114C exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V s Specified from -40 C to +80 C and from -40 C to +125 C