74LVC2G53_3| Datasheet

By datasheet - May 14th, 2008

74LVC2G53_3| Datasheet

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74LVC2G53
2-channel analog multiplexer/demultiplexer
Rev. 03 -- 28 August 2007 Product data sheet

1. General description
The 74LVC2G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device. The 74LVC2G53 provides one analog multiplexer/demultiplexer with a digital select input (S), two independent inputs/outputs (Y0 and Y1), a common input/output (Z) and an active LOW enable input (E). When pin E is HIGH, the switch is turned off. Schmitt-trigger action at the select and enable inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 1.65 V to 5.5 V.

2. Features
s Wide supply voltage range from 1.65 V to 5.5 V s Very low ON resistance: x 7.5 (typical) at VCC = 2.7 V x 6.5 (typical) at VCC = 3.3 V x 6 (typical) at VCC = 5 V s Switch current capability of 32 mA s High noise immunity s CMOS low-power consumption s TTL interface compatibility at 3.3 V s Latch-up performance meets requirements of JESD 78 Class I s ESD protection: x HBM JESD22-A114E exceeds 2000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101C exceeds 1000 V s Control inputs accepts voltages up to 5 V s Multiple package options s Specified from -40 C to +85 C and from -40 C to +125 C