74LVC3GU04_5| Datasheet

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74LVC3GU04
Triple inverter
Rev. 05 -- 5 October 2007 Product data sheet

1. General description
The 74LVC3GU04 provides three inverters. Each inverter is a single stage with unbuffered output. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.

2. Features
I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: N JESD8-7 (1.65 V to 1.95 V) N JESD8-5 (2.3 V to 2.7 V) N JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V 24 mA output drive at VCC = 3.0 V CMOS low power consumption Latch-up performance exceeds 250 mA Multiple package options Specified from -40 C to +85 C and from -40 C to +125 C.

I I I I I

3. Ordering information
Table 1. Ordering information Package Temperature range 74LVC3GU04DP 74LVC3GU04DC 74LVC3GU04GT -40 C to +125 C -40 C to +125 C -40 C to +125 C Name TSSOP8 VSSOP8 XSON8 XQFN8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm plastic very thin shrink small outline package; 8 leads; body width 2.3 mm plastic extremely thin small outline package; no leads; 8 terminals; body 1 1.95 0.5 mm plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 1.6 0.5 mm Version SOT505-2 SOT765-1 SOT833-1 SOT902-1 Type number

74LVC3GU04GM -40 C to +125 C