BUJ100B_1| Datasheet

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Philips Semiconductors

Product specification

Silicon Diffused Power Transistor

BUJ100B

GENERAL DESCRIPTION
High-voltage, high-speed planar-passivated npn power switching transistor in the SOT54 (TO92) envelope intended for use in high frequency electronic lighting ballast applications, converters and inverters, etc.

QUICK REFERENCE DATA
SYMBOL VCESM VCBO VCEO IC ICM Ptot VCEsat hFE tfi PARAMETER Collector-emitter voltage peak value Collector-Base voltage (open emitter) Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Total power dissipation Collector-emitter saturation voltage Fall time (Inductive) CONDITIONS VBE = 0 V TYP. 0.27 12 56 MAX. 700 700 350 1.0 2.0 2.0 1.0 19 76 UNIT V V V A A W V ns

Tlead 25 C IC = 1.0 A;IB = 0.2 A IC = 1.0 A; VCE = 5 V IC = 1.0 A; IB1= 0.2 A

PINNING - SOT54 (TO92)
PIN 1 2 3 Base Collector Emitter DESCRIPTION

PIN CONFIGURATION

SYMBOL
c b e

3 2 1

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL VCESM VCEO VCBO IC ICM IB IBM Ptot Tstg Tj PARAMETER Collector to emitter voltage Collector to emitter voltage (open base) Collector to base voltage (open emitter) Collector current (DC) Collector current peak value Base current (DC) Base current peak value Total power dissipation Storage temperature Junction temperature CONDITIONS VBE = 0 V MIN. -65 MAX. 700 350 700 1.0 2.0 0.5 1.0 2.0 150 150 UNIT V V V A A A A W C C

Tmb 25 C

THERMAL RESISTANCES
SYMBOL Rth j-lead Rth j-a PARAMETER Thermal resistance junction to lead Thermal resistance junction to ambient pcb mounted; lead length = 4 mm CONDITIONS TYP. 150 MAX. 60 UNIT K/W K/W

May 2001

Rev 1.000