BUK7505-30A_2| Datasheet

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Philips Semiconductors

Product specification

TrenchMOSTM transistor Standard level FET
GENERAL DESCRIPTION
N-channel enhancement mode standard level field-effect power transistor in a plastic envelope using 'trench' technology which features very low on-state resistance. It is intended for use in automotive and general purpose switching applications.

BUK7505-30A

QUICK REFERENCE DATA
SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance VGS = 10 V MAX. 30 75 230 175 5 UNIT V A W C m

PINNING - TO220AB
PIN 1 2 3 tab gate drain DESCRIPTION

PIN CONFIGURATION
tab

SYMBOL
d

source drain
1 23

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR VGS ID ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 k Tmb = 25 C Tmb = 100 C Tmb = 25 C Tmb = 25 C MIN. - 55 MAX. 30 30 20 75 75 400 230 175 UNIT V V V A A A W C

THERMAL RESISTANCES
SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS Minimum footprint, FR4 board TYP. 50 MAX. 0.65 UNIT K/W K/W

September 1999

Rev 1.100