SO145406| Datasheet

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Philips Semiconductors Linear Products

Product specification

EIA-232-D/V.28 driver/receiver

MC145406

DESCRIPTION
The MC145406 is a silicon-gate CMOS IC that combines 3 drivers and 3 receivers to fulfill the electrical specifications of standards EIA-232-D and CCITT V.28. The drivers feature true TTL input compatibility, slew-rate limited output, 300 power-off source impedance, and output typically switching to within 25% of the supply rails. The receivers can handle up to +25V while presenting 3 to 7k impedance. Hysteresis in the receiver aids reception of noisy signals. By combining both drivers and receivers in a single CMOS chip, the MC145406 provides efficient, low-power solutions for EIA-232-D and V.28 applications.

PIN CONFIGURATION
D and N Packages
VDD RX1 TX1 RX2 TX2 RX3 TX3 1 2 3 4 5 6 7 8 R D R D R D 16 15 14 13 12 11 10 9 VCC DO1 DI1 DO2 DI2 DO3 DI3 GND

APPLICATIONS

Modem interface Voice/data telephone interface Lap-top computers UART interface
FEATURES

VSS

NOTE: D = Driver R = Receiver

Drivers +5 to +12V supply range 300 power-off source impedance Output current limiting TTL compatible
ORDERING INFORMATION
DESCRIPTION 16-Pin Plastic Dual In-Line (DIP) Package 16-Pin Small Outline Large (SOL) Package

Maximum slew rate = 30V/us Receivers +25V input voltage range over the full supply range 3 to 7k input impedance Hysteresis on input switchpoint General Very low supply currents for long battery life Operation is independent of power supply sequencing
TEMPERATURE RANGE 0 to +70 C 0 to +70 C ORDER CODE MC145406N MC145406D DWG # 0406C 0171B

ABSOLUTE MAXIMUM RATINGS
SYMBOL VCC VDD VSS VIR Supply voltage Supply voltage Supply voltage Input voltage range RX1-3 inputs DI1-3 inputs DC current per pin PD TA TSTG
JA

PARAMETER

RATING -0.5 to +6.0 -0.5 to +13.5 +0.5 to -13.5 (VSS - 15) to (VDD + 15) -0.5 to (VCC + 0.5) +100 1.0 0 to +70 -65 to +150 80 105

UNITS V V V V mA W

Power dissipation (package) Operating temperature range Storage temperature range Thermal impedance N package D package

C C C/W

NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < VDI < VDD and GND < VDO < VCC. Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to VSS < VTX1-3 < VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., GND or VCC for DI, and VSS or VDD for RX).

August 31, 1994

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