MC100LVEL17-D| Datasheet

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MC100LVEL17 3.3V ECL Quad Differential Receiver
Description

The MC100LVEL17 is a 3.3 V ECL, quad differential receiver. The device is functionally equivalent to the E116 device with the capability of operation from either a -3.3 V or +3.3 V supply voltage. Under open input conditions, the D input will be biased at VCC/2 and the D input will be pulled down to VEE. This operation will force the Q output LOW and ensure stability. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.
Features

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SO-20 WB DW SUFFIX CASE 751D

325 ps Propagation Delay High Bandwidth Output Transitions The 100 Series Contains Temperature Compensation PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -3.8 V Internal Input Pulldown Resistors D Inputs; Pullup and Pulldown on D Inputs Q Output will Default LOW with Inputs Open or at VEE Pb-Free Packages are Available*

MARKING DIAGRAM*
20 100LVEL17 AWLYYWWG

1 A WL YY WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package

*For additional marking information, refer to Application Note AND8002/D.

ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.

*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2006

November, 2006 - Rev. 7

Publication Order Number: MC100LVEL17/D