MC10H116-D| Datasheet

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MC10H116 Triple Line Receiver
Description

The MC10H116 is a triple differential amplifier designed for use in sensing differential signals over long lines and is a functional/pinout duplication of the MC10116, with 100% improvement in propagation delay and no increase in power supply current. For termination information see AND8020.
Features

http://onsemi.com MARKING DIAGRAMS*

Propagation Delay, 1.0 ns Typical Power Dissipation 85 mW Typ/Pkg (same as MECL 10KTM) Improved Noise Margin 150 mV (Over Operating Voltage and
4 5 9 10 12 13 VBB* VCC1 = Pin 1 VCC2 = Pin 16 VEE = Pin 8 When input pin with bubble goes positive it's respective output pin with bubble goes positive.

16 1

16 MC10H116L AWLYYWW 1

Temperature Range) Voltage Compensated MECL 10K Compatible Pb-Free Packages are Available*
2 3 6 7 14 15 11

CDIP-16 L SUFFIX CASE 620A

16 16 1 PDIP-16 P SUFFIX CASE 648 1 MC10H116P AWLYYWWG

*VBB to be used to supply bias to the MC10H116 only and bypassed (when used) with 0.01 mF to 0.1 mF capacitor to ground (0 V). VBB can source < 1.0 mA. The MC10H116 is designed to be used in sensing differential signals over long lines. The bias supply (VBB) is made available to make the device useful as a Schmitt trigger, or in other applications where a stable reference voltage is necessary. Active current sources provide these receivers with excellent common-mode noise rejection. If any amplifier in a package is not used, one input of that amplifier must be connected to VBB to prevent unbalancing the current-source bias network. The MC10H116 does not have internal-input pull- down resistors. This provides high impedance to the amplifier input and facilitates differential connections. Applications: Low Level Receiver Voltage Level Schmitt Trigger Interface

1 20

20 1 PLCC-20 FN SUFFIX CASE 775 16

10H116G AWLYYWW

Figure 1. Logic Diagram

16 1

10H116G AWLYWW 1

SO-16 D SUFFIX CASE 751B VCC1 AOUT AOUT AIN AIN BOUT BOUT VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC2 COUT COUT CIN CIN VBB BIN BIN
16 1

16 10H116 ALYWG 1 = Assembly Location = Wafer Lot = Year = Work Week

SOEIAJ-16 M, MEL SUFFIX CASE 966 A WL YY WW

Pin assignment is for Dual-in-Line Package. For PLCC pin assignment, see TND309, the Pin Conversion Tables, page 9.

Figure 2. Dip Pin Assignment
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2006

*For additional marking information, refer to Application Note AND8002/D.

ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet.

February, 2006 - Rev. 10

Publication Order Number: MC10H116/D