MC14014B-D| Datasheet

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MC14014B, MC14021B 8-Bit Static Shift Register
The MC14014B and MC14021B 8-bit static shift registers are constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. These shift registers find primary use in parallel-to-serial data conversion, synchronous and asynchronous parallel input, serial output data queueing; and other general purpose register applications requiring low power and/or high noise immunity.
Features

http://onsemi.com MARKING DIAGRAMS
PDIP-16 P SUFFIX CASE 648 16 MC140xxBCP AWLYYWWG 1

Synchronous Parallel Input/Serial Output (MC14014B) Asynchronous Parallel Input/Serial Output (MC14021B) Synchronous Serial Input/Serial Output Full Static Operation "Q" Outputs from Sixth, Seventh, and Eighth Stages Double Diode Input Protection Supply Voltage Range = 3.0 Vdc to 18 Vdc Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range MC14014B Pin-for-Pin Replacement for CD4014B MC14021B Pin-for-Pin Replacement for CD4021B Pb-Free Packages are Available*

16 SOIC-16 D SUFFIX CASE 751B 1 16 SOEIAJ-16 F SUFFIX CASE 966 1 xx A WL, L YY, Y WW, W G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Indicator MC140xxB ALYWG 140xxBG AWLYWW

MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol VDD Vin, Vout Iin, Iout PD TA Tstg TL Parameter DC Supply Voltage Range Input or Output Voltage Range (DC or Transient) Input or Output Current (DC or Transient) per Pin Power Dissipation, per Package (Note 1) Ambient Temperature Range Storage Temperature Range Lead Temperature (8-Second Soldering) Value -0.5 to +18.0 -0.5 to VDD + 0.5 10 500 -55 to +125 -65 to +150 260 Unit V V mA mW C C C

ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Temperature Derating: Plastic "P and D/DW" Packages: 7.0 mW/_C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Solde
ring and Mounting Techniques Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005

August, 2005 - Rev. 6

Publication Order Number: MC14014B/D