NL17SZ126-D| Datasheet

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NL17SZ126 Non-Inverting 3-State Buffer
The NL17SZ126 is a high performance single noninverting buffer operating from a 1.65 V to 5.5 V supply.
Features http://onsemi.com MARKING DIAGRAM

Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5.0 V Designed for 1.65 V to 5.5 V VCC Operation Over Voltage Tolerant Inputs and Outputs LVTTL Compatible - Interface Capability With 5.0 V TTL Logic with VCC = 3.0 V LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current Substantially Reduces System Power Requirements 3-State OE Input is Active HIGH Replacement for NC7SZ126 Chip Complexity = 36 Feet Pb-Free Packages are Available

SC-88A (SOT-353) DF SUFFIX CASE 419A

M2 M G G

M

M2 MG G SOT-553 XV5 SUFFIX CASE 463B M2 = Specific Device Code D = Date Code G = Pb-Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location.

OE

1

5

VCC

IN A

2

PIN ASSIGNMENT
GND 3 4 OUT Y 1 2 3 OE IN A GND OUT Y VCC

Figure 1. Pinout (Top View)

4 5

FUNCTION TABLE
OE IN A OUT Y OE Input H H L X = Don't Care A Input L H X Y Output L H Z

Figure 2. Logic Symbol

ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.

Semiconductor Components Industries, LLC, 2006

1

February, 2006 - Rev. 5

Publication Order Number: NL17SZ126/D

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NL17SZ126-D DATASHEET