rej27d0007_bc_definition| Datasheet

rej27d0007_bc_definition| Datasheet

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Bi-CMOS Logic IC HD74BC Series Definition
OUTPUT CONTROL tZH DATA OUT 1.5 V tHZ 1.5 V VOH 0.3 V VOH

Figure 4 Three-State Output: tZH, tHZ

OUTPUT CONTROL

1.5 V tZL tLZ

DATA OUT

1.5 V VOL+0.3 V VOL

Figure 5 Three-State Output: tZL, tLZ

DATA IN ts CONTROL INPUT ts MR OR CLEAR trec 1.5 V th

1.5 V

1.5 V

Figure 6 Set Up Time and Hold Time

2.

Test Conditions

The AC test conditions take 0 V as low level and 3 V for high level as same as other families. And input rising and falling time is defined to be 2.5 ns, and 1 ns at maximum clock frequency and pulse-width measurements. DC characteristics tests use VIH and VIL defined in specifications for input voltages. On test, adequate decoupling of power supplies is required to eliminate the influence of noise. Special attention must be paid when an IC tester or a handler is used. To improve the noise margin for testers' inherent noise which does not occur in the actual system, DC input levels may need to be adjusted. Noise immunity testing is performed by raising VIN to the supply voltage, VCC then dropping it to a level corresponding to VIH, and then raising it again to the VCC level. Noise tests can also be performed on the VIL characteristics by raising VIN from 0 V to VIL, then returning it to 0 V. Confirm that no changes appear at outputs when input levels reach VIH or VIL. On fabricating test jigs and tools, high
frequency characteristics should be sufficiently considered for wirings. Leads on the load capacitor should be as short as possible to evaluate ripples and undershoot on output waveforms. Generous ground metal or preferably a plane ground should be used for the same reasons. A VCC bypass capacitor should be provided at the test socket, also with minimum lead lengths.

3.

Multiple Output Switching

Propagation delay is affected by the number of outputs switching simultaneously. Devices with two or more outputs will delay by 250 ps in typical than the specification in datasheet for each increase of simultaneously switching outputs.

REJ27D0007-0100Z/Rev.1.00

July 2004

Page 2 of 5


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