rej27d0028_hc_an| Datasheet

Datasheet preview, take a look at Datasheets before downloading (Data Sheet is available on manufacturer site)

High-Speed CMOS Logic IC HD74HC Series
Application Note
1. Input Protection Circuit

An Si-gate process is applied to Renesas's high-speed CMOS logic ICs. They have a thinner gate oxide compared to conventional Al-gate CMOS logic ICs and are composed into finer patterns. Therefore, an input protection circuit is necessary for the gate to be protected from surges at the input pins. Since Al-gate CMOS logic ICs use a diffusion resistor as the input protection resistor (as shown in Figure 1a), input over-current flows directly to the power supply and the destruction of the protection diode may occur. On the other hand, using polysilicone as its input protection resistor (shown in Figure 1b), high-speed CMOS logic ICs take the role of a current limiter to counter input over voltage.
Input Internal logic circuit VCC

GND Internal logic circuit

P diffusion resistor N sub Input

N+

P well

Input + P diffusion resistor

VCC (a) Al-gate CMOS logic Internal logic circuit GND Poly-Si resistor

GND

VCC
N+diffusion resistor Internal

Poly-Si resistor

+ N diffusion resistor

P well

Input

logic circuit

N sub

VCC (b) Si-gate CMOS logic

GND

Figure 1 Input Protection Device and Equivalent Circuit

Electric Static Discharge Immunity (ESD Immunity)

ESD immunity is evaluated by the capacitor discharge method shown in the test circuit of Figure 2. The capacitor is 200 pF, accounting for the electrostatic capacitance of human bodies. Figure 3 shows an example of ESD immunity of integrated circuits for each products series. The ESD for high-speed CMOS logic is over 200 V, which is the same level or better than LS-TTL.

REJ27D0028-0100Z/Rev.1.00

July 2004

Page 1 of 27