54VCXH162373| Datasheet

54VCXH162373, RHRXH162373K01Q, RHRXH162373K01V, RHRXH162373K02Q, RHRXH162373K02V, RHRXH162373K1, RHRXH162373K2

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54VCXH162373
Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs
Features

1.65 to 3.6V inputs and outputs High speed: tPD = 3.3ns (Max) at VCC = 3.0 to 3.6V tPD = 4.5ns (Max) at VCC = 2.3 to 2.7V Symmetrical impedance outputs: |IOH| = IOL = 12mA (Min) at VCC = 3.0V |IOH| = IOL = 8mA (Min) at VCC = 2.3V Power down protection on inputs and outputs 26 serie resistors in outputs Operating voltage range: VCC(Opr) = 1.65V to 3.6V Pin and function compatible with 54 SERIES HR162373 Bus hold provided on both sides Cold spare function Latch-up performance exceeds 300mA (JESD 17) ESD performance: HBM > 2000V (MIL STD 883 method 3015); MM > 200V 300KRad Mil1019.6 Condition A, (RHA QML qualification extension undergone) No SEL, no SEU under 72 Mev/cm2/mg LET heavy ions irradiation QML qualified product Device fully compliant with DSCC SMD 5962-05211
Flat-48

Description
The 54VCXH162373 is a low voltage CMOS 16 bit d-type latch with 3 state outputs non inverting fabricated with sub-micron silicon gate and fivelayer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs. These 16 bit D-TYPE latches are bite controlled by two latch enable inputs (nLE) and two output enable inputs (OE). While the nLE input is held at a high level, the nQ outputs will follow the data input precisely. When the nLE is taken low, the nQ outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state. Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistor. The device circuits is including 26 series resistance in the outputs. These resistors permit to reduce line noise in high speed applications. All inputs and outputs are equipped with protection circuit
s against static discharge, giving them 2KV ESD immunity and transient excess voltage.

July 2007

Rev 4

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