54VCXHR162245| Datasheet

54VCXHR162245, RHRXHR162245K01Q, RHRXHR162245K01V, RHRXHR162245K02Q, RHRXHR162245K02V, RHRXHR162245K1, RHRXHR162245K2

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54VCXHR162245
Rad hard low voltage CMOS 16-bit bus buffer transceiver (3-state) with 3.6V tolerant inputs and outputs
Features

1.65 to 3.6V inputs and outputs High speed in both A, B outputs: tPD = 3.4ns at VCC = 3.0 to 3.6V tPD = 4.3ns at VCC = 2.3 to 2.7V Symmetrical impedance outputs: |IOH| = IOL = 12mA (Min) at VCC = 3.0V |IOH| = IOL = 8mA (Min) at VCC = 2.3V Power down protection on inputs and outputs 26 serie resistors in bith A and B port outputs Operating voltage range: VCC(Opr) = 1.65V to 3.6V Pin and function compatible with 54 SERIES HR162245 Bus hold provided on both sides Cold spare function Latch-up performance exceeds 300mA (JESD 17) ESD performance: HBM > 2000V (MIL STD 883 method 3015); MM > 200V 300KRad Mil1019.6 Condition A, (RHA QML qualification extension undergone) No SEL, no SEU under 72 Mev/cm2/mg LET heavy ions irradiation QML qualified product Device fully compliant with DSCC SMD 5962-05213
Flat-48

Description
The 54VCXHR162245 is a low voltage CMOS 16 bit bus transceiver (3-state) fabricated with submicron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs. This IC is intended for two-way asynchronous communication between data buses; the direction of data transmission is determined by DIR input. The two enable inputs nG can be used to disable the device so that the buses are effectively isolated. The device circuits is including 26 series resistance in the A and B port outputs. These resistors permit to reduce line noise in high speed applications. Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistor. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z State must be hel
d HIGH or LOW.

July 2007

Rev 5

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