74AC02| Datasheet

74AC02, 74AC02MTR, 74AC02TTR

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74AC02
QUAD 2-INPUT NOR GATE
s s

HIGH SPEED: tPD = 4.2ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2uA(MAX.) at TA=25 C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02 IMPROVED LATCH-UP IMMUNITY

DIP

SOP

TSSOP

ORDER CODES
PACKAGE DIP SOP TSSOP TUBE 74AC02B 74AC02M T&R 74AC02MTR 74AC02TTR

DESCRIPTION The 74AC02 is an advanced high-speed CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology.

The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

April 2001

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