74AC245| Datasheet

74AC245, 74AC245MTR, 74AC245TTR

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74AC245
OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS (NON INVERTED)
s s

HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4uA(MAX.) at TA=25 C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 244 IMPROVED LATCH-UP IMMUNITY

DIP

SOP

TSSOP

ORDER CODES
PACKAGE DIP SOP TSSOP TUBE 74AC245B 74AC245M T&R 74AC245MTR 74AC245TTR

DESCRIPTION The 74AC245 is an advanced high-speed CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. This IC is intended for two-way asynchronous communication between data buses and the direction of data transmission is determined by

DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated.. All floating bus terminals during HIGH-Z state must be held HIGH or LOW All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

April 2001

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