74AC374| Datasheet

74AC374, 74AC374MTR, 74AC374TTR

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74AC374
OCTAL D-TYPE FLIP-FLOP WITH 3 STATE OUTPUTS (NON INVERTED)
s

HIGH SPEED: fMAX = 270MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4uA(MAX.) at TA=25 C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 374 IMPROVED LATCH-UP IMMUNITY

DIP

SOP

TSSOP

ORDER CODES
PACKAGE DIP SOP TSSOP TUBE 74AC374B 74AC374M T&R 74AC374MTR 74AC374TTR

DESCRIPTION The 74AC374 is an advanced high-speed CMOS OCTAL D-TYPE FLIP-FLOP with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. These 8 bit D-Type Flip-Flop are controlled by a clock input (CK) and an output enable input (OE). On the positive transition of the clock, the Q outputs will be set to the logic that were setup at PIN CONNECTION AND IEC LOGIC SYMBOLS

the D inputs. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level); while OE is in high level, the outputs will be in a high impedance state. The output control does not affect the internal operation of flip-flops; that is, the old data can be retained or the new data can be entered even while the outputs are off. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

April 2001

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